Fractionally-addressed Delay Lines

Rocchesso, Davide
DAFx-1998 - Barcelona
While traditional implementations of digital delay lines are based on a circular buffer accessed by two pointers, we propose an implementation where a single fractional pointer is used both for reading and writing operations. On modern general-purpose architectures, the proposed method is nearly as efficient as the popular interpolated circular buffer, but it offers better performance in terms of frequency-dependent attenuation and response to delay-length modulations.